Feedback Transimpedance Amplifier Design

Feedback Transimpedance Amplifier Design project requires LT spice .

In this assignment, you will design a simple feedback network for a transimpedance amplifier. The goal is to achieve an order of magnitude improvement in the bandwidth compared to the open-loop version of the transimpedance amplifier.

A transimpedance amplifier is designed as a common-source stage as on the left. The design parameters are as follows: = 5 , = 3.9 , ( ) 1 = 3.25 1 , ( ) 2 = 10 1 , = 100 , ′ = 40 2 , ′ = 120 2 , = 0.8 , = −0.9 , = 100 Ω, = = 1 . 1. For the values above, calculate 1, 2, 1, 2, 1, 2, 1, 2, = = . 2. Simulate the circuit in LTSpice. Use nmos4 and pmos4 models. Connect nmos4 bulk to ground. Connect pmos4 bulk to VDD. Refer to SPICE Assignment 2 document for entering W and L values of the devices. Enter “.model pmos pmos (kp=40e-6, vt0=- 0.9, cgso=1n, cgdo=1n, lambda=0.01)” and “.model nmos nmos (kp=120e-6, vt0=0.8, cgso=1n, cgdo=1n, lambda=0.01)” for remaining device parameters as shown below.

 

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